ONLY available 3D DRAM technology in the semiconductor industry.
Memory cells along with vertical GAA on top of memory periphery logic

More Die per Wafer
400% More

Vertical Expansion
More Cells Vertically

Simple Process
Reduced Masks

DRAM should be 3D in order to continue cost scaling

3D SUPER-DRAM
ULTIMATE PATH TO LOW COST PER BIT

Even though 3D NAND does not achieve low cost compared to planar NAND yet, NAND successfully transformed from planar to 3D. However, DRAM still stays in 2-dimension and faces scaling limitation mainly because of scaling of storage capacitor.

 

3D Super-DRAM could achieve 400% more die-per-wafer using existing storage capacitor and memory logic circuitry. It is simple and enables ultra-low cost.